ATXMEGA64A1-CU View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

ATXMEGA64A1-CU

8/16-bit XMEGA A1 Microcontroller

Atmel Corporation 

Figure 24-1. ADC overview

Channel A MUX selection

Channel B MUX selection

Channel C MUX selection

Channel D MUX selection

Configuration

Reference selection

ADC

1-64 X

Event

Trigger

XMEGA A1

Channel A

Register

Channel B

Register

Channel C

Register

Channel D

Register

Each ADC has four MUX selection registers with a corresponding result register. This means

that four channels can be sampled within 1.5 µs without any intervention by the application other

than starting the conversion. The results will be available in the result registers.

The ADC may be configured for 8- or 12-bit result, reducing the minimum conversion time (prop-

agation delay) from 3.5 µs for 12-bit to 2.5 µs for 8-bit result.

ADC conversion results are provided left- or right adjusted with optional ‘1’ or ‘0’ padding. This

eases calculation when the result is represented as a signed integer (signed 16-bit number).

PORTA and PORTB each has one ADC. Notation of these peripherals are ADCA and ADCB,

respectively.

42

8067L–AVR–08/10

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