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D950CORE View Datasheet(PDF) - STMicroelectronics

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D950CORE Datasheet PDF : 89 Pages
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D950-Core
The Emulation resources (see Figure 7.7) include:
• Four Breakpoint registers (BP0, BP1, BP2, BP3) which can be affected by
Program or Data memory.
• Breakpoint counter (BPC).
• Program Counter Trace Buffer (PCB) able to store the address of the 6 last
executed instructions.
• Three control registers for Breakpoint condition programming.
• Control logic for instruction execution through the PC-board emulator control.
Figure 7.7 D950-Core Emulation Block Diagram
BP registers
Comparators
IA
XA / YA
XD / YD
IA
RD/WR
PCU
TAP
Control
Registers
Control
Logic
PC trace
ERQ, IDLE, SNAP
The emulation and TAP controller interfaces (see Table 2.7 and Table 2.8) include pins of
different types:
• Scan control (TDI, TDO, TCK).
• TAP instructions
• TAP controller states (UPDATE).
• Emulation control (ERQ, IDLE, SNAP, HALTACK, AIEBP, AXEBP, AYEBP).
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