Enhanced Super I/O Controller with Fast IR
Datasheet
SAx
SD<7:0>
nIOW
t3
t4
t1
t2
t5
Figure 21.1 - IOW Timing for Port 92
NAME
t1
t2
t3
t4
t5
IOW TIMING
DESCRIPTION
SAx Valid to nIOW Asserted
SDATA Valid to nIOW Asserted
nIOW Asserted to SAx Invalid
nIOW Deasserted to DATA Invalid
nIOW Deasserted to nIOW or nIOR Asserted
MIN
TYP MAX UNITS
40
ns
0
ns
10
ns
0
ns
100
ns
t1
V cc
A ll H o s t
A ccesses
t2
t3
Figure 21.2 - Power-Up Timing
NAME
t1
t2
t3
DESCRIPTION
Vcc Slew from 4.5V to 0V
Vcc Slew from 0V to 4.5V
All Host Accesses After Powerup (Note 21.1)
MIN
TYP
300
100
125
Note 21.1 Internal write-protection period after Vcc passes 4.5 volts on power-up
MAX
500
UNITS
µs
µs
µs
SMSC FDC37C672
Page 147
DATASHEET
Rev. 10-29-03