Enhanced Super I/O Controller with Fast IR
Datasheet
AEN
FDRQ,
PDRQ
nDACK
nIOR
or
nIOW
DATA
(DO-D7)
TC
t1
t14
t11
t6
t5
t3
t4
DATA VALID
t15
t16
t2
t12
t8
t7
t13
t10
t9
DATA VALID
Figure 21.9 - DMA Timing (Burst Transfer Mode)
NAME
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
t13
t14
t15
t16
DESCRIPTION
nDACK Delay Time from FDRQ High
DRQ Reset Delay from nIOR or nIOW
FDRQ Reset Delay from nDACK Low
nDACK Width
nIOR Delay from FDRQ High
nIOW Delay from FDRQ High
Data Access Time from nIOR Low
Data Set Up Time to nIOW High
Data to Float Delay from nIOR High
Data Hold Time from nIOW High
nDACK Set Up to nIOW/nIOR Low
nDACK Hold after nIOW/nIOR High
TC Pulse Width
AEN Set Up to nIOR/nIOW
AEN Hold from nDACK
TC Active to PDRQ Inactive
MIN
TYP
MAX
UNITS
0
ns
100
ns
100
ns
150
ns
0
ns
0
ns
100
ns
40
ns
10
60
ns
10
ns
5
ns
10
ns
60
ns
40
ns
10
ns
100
ns
SMSC FDC37C672
Page 153
DATASHEET
Rev. 10-29-03