FDC37C672 View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
Manufacturer
FDC37C672 Datasheet PDF : 173 Pages
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Enhanced Super I/O Controller with Fast IR
Datasheet
PDATA<7:0>
nACK
nAUTOFD
t2
t1
t5
t6
t4
t3
t4
Figure 22.3 - ECP Parallel Port Reverse Timing
NAME
t1
t2
t3
t4
t5
t6
DESCRIPTION
PDATA Valid to nACK Asserted
nAUTOFD Deasserted to PDATA Changed
nACK Asserted to nAUTOFD Deasserted
(Note 22.4, Note 22.5)
nACK Deasserted to nAUTOFD Asserted (Note 22.5)
nAUTOFD Asserted to nACK Asserted
nAUTOFD Deasserted to nACK Deasserted
MIN
TYP MAX UNITS
0
ns
0
ns
80
200
ns
80
200
ns
0
ns
0
ns
Note 22.4 Maximum value only applies if there is room in the FIFO and terminal count has not been received. ECP
can stall by keeping nAUTOFD low.
Note 22.5 nACK is not considered asserted or deasserted until it is stable for a minimum of 75 to 130 ns.
SMSC FDC37C672
Page 167
DATASHEET
Rev. 10-29-03
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