FDC37C672 View Datasheet(PDF) - SMSC -> Microchip

Part Name

Description

Manufacturer

FDC37C672

Enhanced Super I/O Controller with Fast IR

SMSC -> Microchip 

Enhanced Super I/O Controller with Fast IR

Datasheet

BIT NO.

0

SYMBOL

MA

NAME

Missing

Address Mark

DESCRIPTION

Any one of the following:

1. The FDC did not detect an ID address mark at the

specified track after encountering the index pulse from the

IDX pin twice.

2. The FDC cannot detect a data address mark or a deleted

data address mark on the specified track.

BIT NO.

7

6

5

4

3

2

1

0

SYMBOL

CM

DD

WC

BC

MD

Table 6.17 - Status Register 2

NAME

Control Mark

Data Error in

Data Field

Wrong Cylinder

Bad Cylinder

Missing Data

Address Mark

DESCRIPTION

Unused. This bit is always "0".

Any one of the following:

Read Data command - the FDC encountered a deleted data

address mark.

Read Deleted Data command - the FDC encountered a data

address mark.

The FDC detected a CRC error in the data field.

The track address from the sector ID field is different from the

track address maintained inside the FDC.

Unused. This bit is always "0".

Unused. This bit is always "0".

The track address from the sector ID field is different from the

track address maintained inside the FDC and is equal to FF

hex, which indicates a bad track with a hard error according to

the IBM soft-sectored format.

The FDC cannot detect a data address mark or a deleted data

address mark.

BIT NO.

7

6

5

4

3

2

1,0

SYMBOL

WP

T0

HD

DS1,0

Table 6.18 - Status Register 3

NAME

Write Protected

Track 0

Head Address

Drive Select

DESCRIPTION

Unused. This bit is always "0".

Indicates the status of the WP pin.

Unused. This bit is always "1".

Indicates the status of the TRK0 pin.

Unused. This bit is always "1".

Indicates the status of the HDSEL pin.

Indicates the status of the DS1, DS0 pins.

SMSC FDC37C672

Page 35

PRELIMINARY DATASHEET

Rev. 10-29-03

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