FDC37C672 View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
Manufacturer
FDC37C672 Datasheet PDF : 173 Pages
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PHASE
Command
Execution
Result
PHASE
Command
Execution
Result
PHASE
Command
Enhanced Super I/O Controller with Fast IR
Datasheet
DUMPREG
DATA BUS
R/W
D7 D6 D5
D4 D3 D2 D1
W
0
0
0
0
11
1
D0
REMARKS
0
*Note:
Registers
placed in
FIFO
R
────── PCN-Drive 0 ───────
R
────── PCN-Drive 1 ───────
R
────── PCN-Drive 2 ───────
R
────── PCN-Drive 3 ───────
R
──── SRT ────
─── HUT ───
R
─────── HLT ───────
ND
R
─────── SC/EOT ───────
R
LOCK 0
D3
D2 D1 D0 GAP WGATE
R
0
EIS EFIFO POLL
── FIFOTHR ──
R
──────── PRETRK ────────
READ ID
DATA BUS
R/W D7 D6 D5 D4 D3 D2 D1 D0
REMARKS
W
0 MFM 0 0 1
0
1
0 Commands
W
0
0
0 0 0 HDS DS1 DS0
The first correct ID
information on the Cylinder
is stored in Data Register
R
──────── ST0 ────────
Status information after
Command execution.
Disk status after the
Command has completed
R
──────── ST1 ────────
R
──────── ST2 ────────
R
──────── C ────────
R
──────── H ────────
R
──────── R ────────
R
──────── N ────────
PERPENDICULAR MODE
DATA BUS
R/W D7 D6 D5 D4 D3 D2 D1
D0
REMARKS
W
0
0010 0
1
0
Command Codes
OW 0 D3 D2 D1 D0 GAP WGATE
SMSC FDC37C672
Page 48
DATASHEET
Rev. 10-29-03
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