Lattice Semiconductor
ispGDX2 Family Data Sheet
Power Consumption (Continued)
Power consumption in the ispGDX2 family is the sum of three components:
ICC-TOTAL = ICORE + IPLL + IHSI (ICC-TOTAL combines current supplied via VCC pins and VCCP pins)
ICORE = IDC + IREF + IIN
= Blank chip background current
+ KREF * Number of Banks with VREF active
+ (KIN * Number of inputs + KCORE) * Average Input Switching Frequency (MHz)
IPLL = IPLL_D + IPLL_A
= [KPLLD * FVCO * Number of PLLs used] + [KPLLA * FVCO * Number of PLLs used]
= [(KPLLD + KPLLA) * FVCO] * Number of PLLs used
IHSI = IRX + ITX
= [(KRXD + KRXA) * FRX + IRXSTBY] * Number of Receiver Channels
+ [(KTXD + KTXA) * FTX + ITXSTBY] * Number of Transmitter Channels
Where:
FVCO: sysClock PLL VCO Frequency in MHz
FRX: sysHSI Receiver Serial Data Rate
FTX: sysHSI Transmitter Serial Data Rate
IHSI can also be determined by calculating IHSI_D, the current supplied by the VCC pin, and IHSI_A, the current sup-
plied by the VCCP0 and VCCP1.
IHSI = IHSI_D + IHSI_A
= [(KRXD * FRX + IRXSTBY)* Number of Receiver Channels
+ (KTXD * FTX + ITXSTBY) * Number of Transmitter Channels]
+[(KRXA * FRX) * Number of Receiver Channels
+ (KTXA * FTX) * Number of Transmitter Channels]
The ICCP is supplied through VCCP0 and VCCP1 pins for PLL and sysHSI analog portion. The equation for ICCP can
be derived from the equations below.
ICCP
Where:
= IPLL_A + IHSI_A
= [(KPLLA * FVCO) * Number of PLLs used]
+ [(KRXA * FRX) * Number of Receiver Channels
+ (KTXA * FTX) * Number of Transmitter Channels]
IPLL_A: PLL Analog Portion Current
IHSI_A: HSI Analog Portion Current
Note: For further information about the use of these coefficients, refer to Technical Note TN1034, Power Estimation
in the ispGDX2 Family.
ICC-TOTAL estimates are based on typical conditions. These values are for estimates only. Since the value of ICC-
TOTAL is sensitive to operating conditions and the program in the device, the actual current should be verified.
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