ST92F124JDV2TC View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST92F124JDV2TC

8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E³ ™ (EMULATED EEPROM), CAN 2.0B AND J1850 BLPD

STMicroelectronics 

ST92F124/F150/F250 - ELECTRICAL CHARACTERISTICS

MULTIFUNCTION TIMER EXTERNAL TIMING TABLE

(VDD = 5V ± 10%, TA = –40°C to +125°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified)

N° Symbol

Parameter

1 TwCTW External clock/trigger pulse width

2 TwCTD External clock/trigger pulse distance

3 TwAED Distance between two active edges

4 TwGW Gate pulse width

5

TwLBA

Distance between TINB pulse edge and the fol-

lowing TINA pulse edge

Value

Formula

Min

n x Tck

n x 42

n x Tck

n x 42

3 x Tck

125

6 x Tck

250

Tck

42

Max

-

-

-

-

-

Unit Note

ns

(1)

ns

(1)

ns

ns

ns

(2)

6

TwLAB

Distance between TINA pulse edge and the fol-

lowing TINB pulse edge

7 TwAD Distance between two TxINA pulses

8 TwOWD Minimum output pulse width/distance

3 x Tck

0

-

ns

(2)

0

-

ns

(2)

125

-

ns

Note: The value in the left hand column shows the formula used to calculate the timing minimum or maximum from the oscillator clock period,

standard timer prescaler and counter programmed values.

The value in the right hand two columns show the timing minimum and maximum for an internal clock (INTCLK) at 24MHz.

(1) n = 1 if the input is rising OR falling edge sensitive

n = 3 if the input is rising AND falling edge sensitive

(2) In Autodiscrimination mode

Legend:

Tck = INTCLK period = Crystal Oscillator Clock period when CLOCK1 is not divided by 2;

2 x Crystal Oscillator Clock period when CLOCK1 is divided by 2;

Crystal Oscillator Clock period x PLL factor when the PLL is enabled.

MULTIFUNCTION TIMER EXTERNAL TIMING

393/429

1

Share Link: