LTM2883
Pin Functions (LTM2883-I)
Logic Side
DO2 (A1): Digital Output, Referenced to VL and GND. Logic
output connected to I2 through isolation barrier. Under
the condition of an isolation communication failure this
output is in a high impedance state.
DNC (A2): Do Not Connect Pin. Pin connected internally.
SCL (A3): Serial I2C Clock Input, Referenced to VL and
GND. Logic input connected to isolated side SCL2 pin
through isolation barrier. Clock is unidirectional from logic
to isolated side. Do not float.
SDA (A4): Serial I2C Data Pin, Referenced to VL and GND.
Bidirectional logic pin connected to isolated side SDA2 pin
through isolation barrier. Under the condition of an isola-
tion communication failure this pin is in a high impedance
state. Do not float.
DI1 (A5): Digital Input, Referenced to VL and GND. Logic
input connected to O1 through isolation barrier. The logic
state on DI1 translates to the same logic state on O1. Do
not float.
GND (A6, B2 to B6): Circuit Ground.
ON (A7): Enable. Enables power and data communica-
tion through the isolation barrier. If ON is high the part is
enabled and power and communications are functional
to the isolated side. If ON is low the logic side is held in
reset, all digital outputs are in a high impedance state, and
the isolated side is unpowered. Do not float.
VL (A8): Logic Supply. Interface supply voltage for pins
DI1, SCL, SDA, DO1, DO2, and ON. Operating voltage is
3V to 5.5V. Internally bypassed with 2.2µF.
DO1 (B1): Digital Output, Referenced to VL and GND. Logic
output connected to I1 through isolation barrier. Under
the condition of an isolation communication failure this
output is in a high impedance state.
VCC (B7 to B8): Supply Voltage. Operating voltage is 3V
to 3.6V for LTM2883-3 and 4.5V to 5.5V for LTM2883-5.
Internally bypassed with 2.2µF.
Isolated Side
I2 (L1): Digital Input, Referenced to VCC2 and GND2.
Logic input connected to DO2 through isolation barrier.
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The logic state on I2 translates to the same logic state on
DO2. Do not float.
DNC (L2): Do Not Connect Pin. Pin connected internally.
SCL2 (L3): Serial I2C Clock Output, Referenced to VCC2
and GND2. Logic output connected to logic side SCL pin
through isolation barrier. Clock is unidirectional from logic
to isolated side. SCL2 has a push-pull output stage, do not
connect an external pull-up device. Under the condition of
an isolation communication failure this output defaults to
a high state.
SDA2 (L4): Serial I2C Data Pin, Referenced to VCC2 and
GND2. Bidirectional logic pin connected to logic side SDA
pin through isolation barrier. Output is biased high by a
1.8mA current source. Do not connect an external pull-
up device to SDA2. Under the condition of an isolation
communication failure this output defaults to a high state.
O1 (L5): Digital Output, Referenced to VCC2 and GND2.
Logic output connected to DI1 through isolation barrier.
Under the condition of an isolation communication failure
O1 defaults to a high state.
VCC2 (L6): 5V Nominal Isolated Supply Voltage. Internally
generated from VCC by an isolated DC/DC converter and
regulated to 5V. Internally bypassed with 2.2µF.
V– (L7): –12.5V Nominal Isolated Supply Voltage. Internally
generated from VCC by an isolated DC/DC converter and
regulated to –12.5V. Internally bypassed with 1µF.
V+ (L8): 12.5V Nominal Isolated Supply Voltage. Internally
generated from VCC by an isolated DC/DC converter and
regulated to 12.5V. Internally bypassed with 1µF.
I1 (K1): Digital Input, Referenced to VCC2 and GND2.
Logic input connected to DO1 through isolation barrier.
The logic state on I1 translates to the same logic state on
DO1. Do not float.
GND2 (K2 to K5): Isolated Ground.
AVCC2 (K6): 5V Nominal Isolated Supply Voltage Adjust.
The adjust pin voltage is 600mV referenced to GND2.
AV– (K7): –12.5V Nominal Isolated Supply Voltage Adjust.
The adjust pin voltage is –1.22V referenced to GND2.
AV+ (K8): 12.5V Nominal Isolated Supply Voltage Adjust.
The adjust pin voltage is 1.22V referenced to GND2.
2883f