M41ST85W
DC and AC parameters
Table 11. DC characteristics
Sym
Parameter
Test condition(1)
M41ST85W
Unit
Min Typ Max
IBAT(2)
Battery current OSC ON
Battery current OSC OFF
TA = 25°C, VCC = 0V, VBAT = 3V
400
500
nA
50
nA
ICC1 Supply current
ICC2 Supply current (standby)
ILI(3)
Input leakage current
Input leakage current (PFI)
ILO(4) Output leakage current
IOUT1(5) VOUT current (active)
IOUT2 VOUT current (battery back-up)
VIH Input high voltage
VIL Input low voltage
VBAT Battery voltage
VOH Output high voltage(7)
Pull-up supply voltage (open drain)
VOHB(8) VOH (battery back-up)
Output low voltage
VOL Output low voltage (open drain)(9)
VPFD
VPFI
Power fail deselect
PFI input threshold
PFI hysteresis
f = 400kHz
SCL, SDA = VCC – 0.3V
or VSS + 0.3V
0V ≤ VIN ≤ VCC
0V ≤ VIN ≤ VCC
VOUT1 > VCC – 0.3V
VOUT2 > VBAT – 0.3V
IOH = –1.0mA
RST, IRQ/FT/OUT
IOUT2 = –1.0µA
IOL = 3.0mA
IOL = 10mA
VCC = 3V(W)
PFI Rising
0.75
mA
0.50
mA
±1
µA
–25
2
25
nA
±1
µA
100
mA
100
µA
0.7VCC
VCC + 0.3 V
–0.3
0.3VCC
V
2.5
3.0
3.5(6)
V
2.4
V
3.6
V
2.5 2.9
3.5
V
0.4
V
0.4
V
2.55 2.60 2.70
V
1.225 1.250 1.275
V
20
70
mV
VSO Battery back-up switchover
2.5
V
1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 2.7 to 3.6V (except where noted).
2. Measured with VOUT and ECON open.
3. RSTIN1 and RSTIN2 internally pulled-up to VCC through 100KΩ resistor. WDI internally pulled-down to VSS through
100KΩ resistor.
4. Outputs Deselected.
5. External SRAM must match RTC SUPERVISOR chip VCC specification.
6. For rechargeable back-up, VBAT (max) may be considered VCC.
7. For PFO and SQW pins (CMOS).
8. Conditioned output (ECON) can only sustain CMOS leakage current in the battery back-up mode. Higher leakage currents
will reduce battery life.
9. For IRQ/FT/OUT, RST pins (Open Drain): if pulled-up to supply other than VCC, this supply must be equal to, or less than
3.0V when VCC = 0V (during battery back-up mode).
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