M41ST85WMX6 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M41ST85WMX6

3.0/3.3V I²C combination serial RTC, NVRAM supervisor and microprocessor supervisor

STMicroelectronics 

DC and AC parameters

Figure 19. Bus timing requirements sequence

M41ST85W

SDA

tBUF

SCL

P

tHD:STA

tR

tF

tHIGH

S

tLOW

tHD:STA

tSU:DAT

tHD:DAT

tSU:STA

SR

tSU:STO

P

AI00589

Table 12. AC characteristics

Symbol

Parameter(1)

Min Max Unit

fSCL

tBUF

tEXPD

tF

tHD:DAT(2)

tHD:STA

tHIGH

tLOW

tR

tSU:DAT

tSU:STA

tSU:STO

SCL Clock Frequency

Time the bus must be free before a new transmission can start

EX to ECON Propagation Delay

SDA and SCL Fall Time

Data Hold Time

START Condition Hold Time (after this period the first clock pulse is generated)

Clock High Period

Clock Low Period

SDA and SCL Rise Time

Data Setup Time

START Condition Setup Time (only relevant for a repeated start condition)

STOP Condition Setup Time

0 400 kHz

1.3

µs

15 ns

300 ns

0

µs

600

ns

600

ns

1.3

µs

300 ns

100

ns

600

ns

600

ns

1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 2.7 to 3.6V (except where otherwise noted).

2. Transmitter must internally provide a hold time to bridge the undefined region (300ns max) of the falling edge of SCL.

32/41

Share Link: