M41T83SQA6E View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
M41T83SQA6E Datasheet PDF : 58 Pages
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M41T82 M41T83
Table 8. Alarm repeat modes
RPT5 RPT4 RPT3 RPT2
1
1
1
1
1
1
1
1
1
1
1
0
1
1
0
0
1
0
0
0
0
0
0
0
RPT1
1
0
0
0
0
0
Clock operation
Alarm setting
Once per second
Once per minute
Once per hour
Once per day
Once per month
Once per year
3.7
Watchdog timer
The watchdog timer can be used to detect an out-of-control microprocessor. The user
programs the watchdog timer by setting the desired amount of time-out into the Watchdog
Register, address 09h. Bits BMB4-BMB0 store a binary multiplier and the two lower order
bits RB1-RB0 select the resolution, where 00 = 1/16 second, 01 = 1/4 second, 10 = 1
second, and 11 = 4 seconds. The amount of time-out is then determined to be the
multiplication of the five-bit multiplier value with the resolution. (For example: writing
00001110 in the Watchdog Register = 3*1, or 3 seconds). If the processor does not reset
the timer within the specified period, the M41T8x sets the WDF (Watchdog Flag) and
generates a watchdog interrupt.
The watchdog timer can be reset by having the microprocessor perform a WRITE of the
Watchdog Register. The time-out period then starts over.
Should the watchdog timer time-out, a value of 00h needs to be written to the Watchdog
Register in order to clear the IRQ1/FT/OUT pin. This will also disable the watchdog function
until it is again programmed correctly. A READ of the Flags Register will reset the Watchdog
Flag (bit D7; Register 0Fh).
The watchdog function is automatically disabled upon power-up and the Watchdog Register
is cleared. If the watchdog function is set, the frequency test function is activated, and the
SQWE bit is '0,' the watchdog function prevails and the frequency test function is denied.
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