M50FLW040A, M50FLW040B
Command interface
4.0.7
4.0.8
4.0.9
Chip Erase command
The Chip Erase Command erases the entire memory array, setting all of the bits to ‘1’. All
previous data in the memory array are lost. This command, though, is only available under
the A/A Mux interface.
Two Bus Write operations are required to issue the command, and to start the
Program/Erase Controller. Once the command is issued, subsequent Bus Read operations
read the contents of the Status Register. (See the section on the Status Register for details
on the definitions of the Status Register bits.)
Erasing should not be attempted when VPP is not at VPPH, otherwise the result is uncertain.
During the Chip Erase operation, the memory will only accept the Read Status Register
command. All other commands are ignored.
See Figure 25, for a suggested flowchart on using the Chip Erase command. Typical Chip
Erase times are given in Table 18.
Block Erase command
The Block Erase command is used to erase a block, setting all of the bits to ‘1’. All previous
data in the block are lost.
Two Bus Write operations are required to issue the command. The second Bus Write cycle
latches the block address and starts the Program/Erase Controller. Once the command is
issued, subsequent Bus Read operations read the contents of the Status Register. (See the
section on the Status Register for details on the definitions of the Status Register bits.)
If the block is protected (FWH/LPC only) then the Block Erase operation will abort, the data
in the block will not be changed, and the Status Register will indicate the error.
During the Block Erase operation the memory will only accept the Read Status Register and
Program/Erase Suspend commands. All other commands are ignored.
See Figure 26, for a suggested flowchart on using the Block Erase command. Typical Block
Erase times are given in Table 18.
Sector Erase command
The Sector Erase command is used to erase a Uniform 4-KByte Sector, setting all of the bits
to ‘1’. All previous data in the sector are lost.
Two Bus Write operations are required to issue the command. The second Bus Write cycle
latches the Sector address and starts the Program/Erase Controller. Once the command is
issued, subsequent Bus Read operations read the contents of the Status Register. (See the
section on the Status Register for details on the definitions of the Status Register bits.)
If the Block to which the Sector belongs is protected (FWH/LPC only) then the Sector Erase
operation will abort, the data in the Sector will not be changed, and the Status Register will
indicate the error.
During the Sector Erase operation the memory will only accept the Read Status Register
and Program/Erase Suspend commands. All other commands are ignored.
See Figure 26, for a suggested flowchart on using the Sector Erase Command. Typical
Sector Erase times are given in Table 18.
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