MB90P663APFM View Datasheet(PDF) - Fujitsu

Part Name

Description

Manufacturer

MB90P663APFM

16-bit Proprietary Microcontroller

Fujitsu 

MB90660A Series

s INTERRUPT SOURCES, INTERRUPT VECTORS

AND INTERRUPT CONTROL REGISTERS

Interrupt source

Reset

INT9 instruction

Exception

Multi-function timer DTTI input

External interrupt #0

External interrupt #4

Multi-function timer trigger input or

zero detect

Multi-function timer zero detect

Multi-function timer overflow, compare

clear or zero detect

External interrupt #1

Multi-function timer compare match

External interrupt #5

PWM underflow

External interrupt #2

External interrupt #6

16-bit reload timer #0

16-bit reload timer #1

16-bit reload timer #2

16-bit reload timer #3

End of A/D converter conversion

Timebase timer interval interrupt

UART send complete

UART receive complete

External interrupt #3

External interrupt #7

Delayed interrupt generator module

I2OS

support

×

×

×

×

×

×

×

×

Interrupt vector

Number

Address

#08 08H FFFFDCH

#09 09H FFFFD8H

#10 0AH FFFFD4H

#12 0CH FFFFCCH

#13 0DH FFFFC8H

#14 0EH FFFFC4H

#15 0FH FFFFC0H

#17 11H FFFFB8H

#19 13H FFFFB0H

#21 15H FFFFA8H

#22 16H FFFFA4H

#23 17H FFFFA0H

#24 18H FFFF9CH

#25 19H FFFF98H

#26 1AH FFFF94H

#27 1BH FFFF90H

#28 1CH FFFF8CH

#29 1DH FFFF88H

#30 1EH FFFF84H

#31 1FH FFFF80H

#34 22H FFFF74H

#35 23H FFFF70H

#37 25H FFFF68H

#39 27H FFFF60H

#40 28H FFFF5CH

#42 2AH FFFF54H

Interrupt control register

ICR

Address

—

—

—

—

—

—

ICR00

0000B0H

ICR01

0000B1H

ICR02

ICR03

ICR04

0000B2H

0000B3H

0000B4H

ICR05

0000B5H

ICR06

0000B6H

ICR07

0000B7H

ICR08

0000B8H

ICR09

ICR10

ICR11

ICR12

ICR13

ICR14

ICR15

0000B9H

0000BAH

0000BBH

0000BCH

0000BDH

0000BEH

0000BFH

: indicates that the interrupt request flag is cleared by the I2OS interrupt clear signal (no stop request).

: indicates that the interrupt request flag is cleared by the I2OS interrupt clear signal (with stop request).

: indicates that the interrupt request flag is not cleared by the I2OS interrupt clear signal.

Note: Do not specify I2OS activation in interrupt control registers that do not support I2OS.

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