MB90660A Series
s PERIPHERAL RESOURCES
1. Parallel Port
The MB90660A includes 39 I/O pins, 4 input pins, and 8 open-drain output pins.
Port 0, 1, 2, 3 and 6 are I/O ports. They are used for input when the corresponding direction register value is
“0”, and for output when the value is “1”.
Port 5 is an open-drain port. It is used as a port when the analog input enable register is “0”.
Ports 40 to 43 are I/O ports. They are used for input when the corresponding direction register value is “0”, and
for output when the value is “1”. Ports 44 to 47 are input ports which can only be used for reading data.
(1) Register Configuration
Port Data Register
bit
Address : PDR1 000001H
: PDR3 000003H
Read/Write
Initial value
15 14 13 12 11 10 9 8
PD×7 PD×6 PD×5 PD×4 PD×3 PD×2 PD×1 PD×0
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(X) (X) (X) (X) (X) (X) (X) (X)
PDR1, 3
bit
Port Data Register
Address : PDR0 000000H
: PDR2 000002H
: PDR6 000006H
(PDBR)
Read/Write
Initial value
bit
Port Data Register
Address : 000005H
Read/Write
Initial value
7
6
5
4
3
2
1
0
PD×7 PD×6 PD×5 PD×4 PD×3 PD×2 PD×1 PD×0
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(X) (X) (X) (X) (X) (X) (X) (X)
15 14 13 12 11 10 9 8
PD57 PD56 PD55 PD54 PD53 PD52 PD51 PD50
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(1) (1) (1) (1) (1) (1) (1) (1)
PDR0, 2, 6
PDR5
bit
Port Data Register
Address : 000004H
Read/Write
Initial value
7
6
5
4
3
2
1
0
PD47 PD46 PD45 PD44 PD43 PD42 PD41 PD40
(R) (R) (R) (R) (R/W) (R/W) (R/W) (R/W)
(X) (X) (X) (X) (X) (X) (X) (X)
PDR4
Notes: There are no register bits for bits 15 to 12 of Port 3.
There is no register bit for bit 7 of Port 6.
Bits 7 to 4 of Port 4 can only be used to read data.
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