DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

MB90P663APFM View Datasheet(PDF) - Fujitsu

Part Name
Description
Manufacturer
MB90P663APFM Datasheet PDF : 84 Pages
First Prev 71 72 73 74 75 76 77 78 79 80 Next Last
MB90660A Series
Table 18 Branch 1 Instructions [31 Instructions]
Mnemonic #
~ RG B
Operation
LH AH I S T N Z V C RMW
BZ/BEQ
rel 2
BNZ/BNE rel 2
BC/BLO
rel 2
BNC/BHS rel 2
BN
rel
2
BP
rel
2
BV
rel
2
BNV rel
2
BT
rel
2
BNT
rel
2
BLT
rel
2
BGE rel
2
BLE
rel
2
BGT rel
2
BLS
rel
2
BHI
rel
2
BRA rel
2
*1
0
0 Branch when (Z) = 1
––––––––– –
*1
0
0 Branch when (Z) = 0
––––––––– –
*1
0
0 Branch when (C) = 1
––––––––– –
*1
0
0 Branch when (C) = 0
––––––––– –
*1
0
0 Branch when (N) = 1
––––––––– –
*1
0
0 Branch when (N) = 0
––––––––– –
*1
0
0 Branch when (V) = 1
––––––––– –
*1
0
0 Branch when (V) = 0
––––––––– –
*1
0
0 Branch when (T) = 1
––––––––– –
*1
0
0 Branch when (T) = 0
––––––––– –
*1
0
0 Branch when (V) xor (N) = 1
––––––––– –
*1
*1
*1
*1
*1
*1
0
0 Branch when (V) xor (N) = 0
––––––––– –
0
0 Branch when ((V) xor (N)) or (Z) = 1
––––––––– –
0
0 Branch when ((V) xor (N)) or (Z) = 0
––––––––– –
0
0 Branch when (C) or (Z) = 1
––––––––– –
0
0 Branch when (C) or (Z) = 0
––––––––– –
0
0 Branch unconditionally
––––––––– –
JMP
JMP
JMP
JMP
JMPP
JMPP
JMPP
@A
1
addr16
3
@ear
2
@eam 2+
@ear *3 2
@eam *3 2+
addr24
4
2
3
3
4+ (a)
5
6+ (a)
4
0
0
1
0
2
0
0
0 word (PC) (A)
––––––––– –
0 word (PC) addr16
––––––––– –
0 word (PC) (ear)
––––––––– –
(c) word (PC) (eam)
––––––––– –
0 word (PC) (ear), (PCB) (ear +2) – – – – – – – – – –
(d) word (PC) (eam), (PCB) (eam +2) – – – – – – – – – –
0 word (PC) ad24 0 to 15,
––––––––– –
(PCB) ad24 16 to 23
CALL @ear *4 2
CALL @eam *4 2+
CALL addr16 *5 3
CALLV #vct4 *5 1
CALLP @ear *6 2
6
7+ (a)
6
7
10
1 (c) word (PC) (ear)
0 2× (c) word (PC) (eam)
0 (c) word (PC) addr16
0 2× (c) Vector call instruction
2 2× (c) word (PC) (ear) 0 to 15
(PCB) (ear) 16 to 23
––––––––– –
––––––––– –
––––––––– –
––––––––– –
––––––––– –
CALLP @eam *6 2+ 11+ (a) 0
*2 word (PC) (eam) 0 to 15
(PCB) (eam) 16 to 23
––––––––– –
CALLP addr24 *7 4
10
0 2× (c) word (PC) addr0 to 15,
(PCB) addr16 to 23
––––––––– –
*1: 4 when branching, 3 when not branching.
*2: (b) + 3 × (c)
*3: Read (word) branch address.
*4: W: Save (word) to stack; R: read (word) branch address.
*5: Save (word) to stack.
*6: W: Save (long word) to W stack; R: read (long word) R branch address.
*7: Save (long word) to stack.
Note: For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
75

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]