MB90660A Series
Table 21 Bit Manipulation Instructions [21 Instructions]
Mnemonic
#
MOVB A, dir:bp
3
MOVB A, addr16:bp 4
MOVB A, io:bp
3
MOVB dir:bp, A
3
MOVB addr16:bp, A 4
MOVB io:bp, A
3
SETB dir:bp
3
SETB addr16:bp
4
SETB io:bp
3
CLRB dir:bp
3
CLRB addr16:bp
4
CLRB io:bp
3
BBC
BBC
BBC
dir:bp, rel
4
addr16:bp, rel 5
io:bp, rel
4
BBS
BBS
BBS
dir:bp, rel
4
addr16:bp, rel 5
io:bp, rel
4
SBBS addr16:bp, rel 5
WBTS io:bp
3
WBTC io:bp
3
~ RG B
Operation
LH AH I S T N Z V C RMW
5 0 (b) byte (A) ← (dir:bp) b
5 0 (b) byte (A) ← (addr16:bp) b
4 0 (b) byte (A) ← (io:bp) b
Z*–––* *–– –
Z*–––* *–– –
Z*–––* *–– –
7 0 2× (b) bit (dir:bp) b ← (A)
7 0 2× (b) bit (addr16:bp) b ← (A)
6 0 2× (b) bit (io:bp) b ← (A)
–––––* *–– *
–––––* *–– *
–––––* *–– *
7 0 2× (b) bit (dir:bp) b ← 1
7 0 2× (b) bit (addr16:bp) b ← 1
7 0 2× (b) bit (io:bp) b ← 1
––––––––– *
––––––––– *
––––––––– *
7 0 2× (b) bit (dir:bp) b ← 0
7 0 2× (b) bit (addr16:bp) b ← 0
7 0 2× (b) bit (io:bp) b ← 0
––––––––– *
––––––––– *
––––––––– *
*1 0 (b) Branch when (dir:bp) b = 0
*1 0 (b) Branch when (addr16:bp) b = 0
*2 0 (b) Branch when (io:bp) b = 0
–––––– *–– –
–––––– *–– –
–––––– *–– –
*1 0 (b) Branch when (dir:bp) b = 1
*1 0 (b) Branch when (addr16:bp) b = 1
*2
0
(b) Branch when (io:bp) b = 1
–––––– *–– –
–––––– *–– –
–––––– *–– –
*3
0 2× (b) Branch when (addr16:bp) b = 1, bit = 1 – – – – – – * – – *
*4
0
*5 Wait until (io:bp) b = 1
*4
0
*5 Wait until (io:bp) b = 0
––––––––– –
––––––––– –
*1: 8 when branching, 7 when not branching
*2: 7 when branching, 6 when not branching
*3: 10 when condition is satisfied, 9 when not satisfied
*4: Undefined count
*5: Until condition is satisfied
Note: For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
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