MCP413X/415X/423X/425X
6.0 SERIAL INTERFACE (SPI)
The MCP4XXX devices support the SPI serial protocol.
This SPI operates in the slave mode (does not
generate the serial clock).
The SPI interface uses up to four pins. These are:
• CS - Chip Select
• SCK - Serial Clock
• SDI - Serial Data In
• SDO - Serial Data Out
Typical SPI Interfaces are shown in Figure 6-1. In the
SPI interface, The Master’s Output pin is connected to
the Slave’s Input pin and the Master’s Input pin is
connected to the Slave’s Output pin.
The MCP4XXX SPI’s module supports two (of the four)
standard SPI modes. These are Mode 0,0 and 1,1.
The SPI mode is determined by the state of the SCK
pin (VIH or VIL) on the when the CS pin transitions from
inactive (VIH) to active (VIL or VIHH).
All SPI interface signals are high-voltage tolerant.
Typical SPI Interface Connections
Host
Controller
SDO
( Master Out - Slave In (MOSI) )
SDI
( Master In - Slave Out (MISO) )
SCK
I/O (1)
MCP4XXX
SDI
SDO
SCK
CS
Typical MCP41X1 SPI Interface Connections (Host Controller Hardware SPI)
Host
Controller
SDO
SDI
SCK
I/O (1)
R1(2)
MCP41X1
SDI/SDO
SDI
SCK
CS
SDO
Alternate MCP41X1 SPI Interface Connections (Host Controller Firmware SPI)
Host
Controller
I/O
(SDO/SDI)
MCP41X1
SDI/SDO
SDI
I/O
(SCK)
I/O (1)
SCK
CS
SDO
Note 1: If High voltage commands are desired, some type of external circuitry needs to be
implemented.
2: R1 must be sized to ensure VIL and VIH of the devices are met.
FIGURE 6-1:
Typical SPI Interface Block Diagram.
© 2008 Microchip Technology Inc.
DS22060B-page 41