MCP4162T-502I/SL View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

MCP4162T-502I/SL

7/8-Bit Single/Dual SPI Digital POT with Volatile Memory

Microchip Technology 

MCP413X/415X/423X/425X

TABLE 7-2: MEMORY MAP AND THE SUPPORTED COMMANDS

Address

Value

Function

Command

Data

(10-bits) (1)

SPI String (Binary)

MOSI (SDI pin)

MISO (SDO pin) (2)

00h Volatile Wiper 0 Write Data

nn nnnn nnnn

0000 00nn nnnn nnnn

1111 1111 1111 1111

Read Data

nn nnnn nnnn

0000 11nn nnnn nnnn

1111 111n nnnn nnnn

Increment Wiper

—

0000 0100

1111 1111

Decrement Wiper

—

0000 1000

1111 1111

01h Volatile Wiper 1 Write Data

nn nnnn nnnn

0001 00nn nnnn nnnn

1111 1111 1111 1111

Read Data

nn nnnn nnnn

0001 11nn nnnn nnnn

1111 111n nnnn nnnn

Increment Wiper

—

0001 0100

1111 1111

Decrement Wiper

—

0001 1000

1111 1111

02h Reserved

—

—

—

—

03h Reserved

—

—

—

—

04h Volatile

Write Data

TCON Register Read Data

nn nnnn nnnn

nn nnnn nnnn

0100 00nn nnnn nnnn

0100 11nn nnnn nnnn

1111 1111 1111 1111

1111 111n nnnn nnnn

05h Status Register Read Data

nn nnnn nnnn

0101 11nn nnnn nnnn

1111 111n nnnn nnnn

06h-0Fh Reserved

—

—

—

—

Note 1: The Data Memory is only 9-bits wide, so the MSb is ignored by the device.

2: All these Address/Command combinations are valid, so the CMDERR bit is set. Any other Address/Command

combination is a command error state and the CMDERR bit will be clear.

DS22060B-page 48

© 2008 Microchip Technology Inc.

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