MH8S72PHC-10 View Datasheet(PDF) - MITSUBISHI ELECTRIC

Part Name

Description

Manufacturer

MH8S72PHC-10

603979776-BIT (8388608 - WORD BY 72-BIT)SynchronousDRAM

MITSUBISHI ELECTRIC  

Preliminary Spec.

Some contents are subject to change without notice.

MITSUBISHI LSIs

MH8S72PHC -7,-8,-10

603979776-BIT (8388608 - WORD BY 72-BIT)SynchronousDRAM

DQM CONTROL

DQMB0-7 is a dual function signal defined as the data mask for writes and the output

disable for reads. During writes, DQMB0-7 masks input data word by word. DQMB0-7

to write mask latency is 0.

During reads, DQMB0-7 forces output to Hi-Z word by word. DQMB0-7 to output Hi-Z

latency is 2.

DQM Function

CK

Command

Write

READ

DQMB0-7

DQ

D0

D2 D3

Q0 Q1

Q3

masked by DQM=H

disabled by DQM=H

MIT-DS-0283-0.0

MITSUBISHI

ELECTRIC

( 30 / 55 )

9/ Dec. /1998

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