NXP Semiconductors
P89LPC9301/931A1
8-bit microcontroller with accelerated two-clock 80C51 core
7.24.1 Typical SPI configurations
master
8-BIT SHIFT
REGISTER
SPI CLOCK
GENERATOR
MISO
MOSI
SPICLK
PORT
MISO
MOSI
SPICLK
SS
slave
8-BIT SHIFT
REGISTER
Fig 10. SPI single master single slave configuration
002aaa901
master
8-BIT SHIFT
REGISTER
SPI CLOCK
GENERATOR
MISO
MOSI
SPICLK
SS
MISO
MOSI
SPICLK
SS
slave
8-BIT SHIFT
REGISTER
SPI CLOCK
GENERATOR
002aaa902
Fig 11. SPI dual device configuration, where either can be a master or a slave
P89LPC9301_931A1_1
Preliminary data sheet
Rev. 01 — 9 April 2009
© NXP B.V. 2009. All rights reserved.
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