P89LPC932A1FDH View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

Manufacturer

P89LPC932A1FDH

8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM

NXP Semiconductors. 

NXP Semiconductors

P89LPC932A1

8-bit microcontroller with accelerated two-clock 80C51 core

7.21 I2C-bus serial interface

The I2C-bus uses two wires (SDA and SCL) to transfer information between devices

connected to the bus, and it has the following features:

• Bidirectional data transfer between masters and slaves.

• Multi master bus (no central master).

• Arbitration between simultaneously transmitting masters without corruption of serial

data on the bus.

• Serial clock synchronization allows devices with different bit rates to communicate via

one serial bus.

• Serial clock synchronization can be used as a handshake mechanism to suspend and

resume serial transfer.

• The I2C-bus may be used for test and diagnostic purposes.

A typical I2C-bus configuration is shown in Figure 14. The P89LPC932A1 device provides

a byte-oriented I2C-bus interface that supports data transfers up to 400 kHz.

I2C-bus

RP

RP

P1.3/SDA P1.2/SCL

P89LPC932A1

OTHER DEVICE

WITH I2C-BUS

INTERFACE

Fig 14. I2C-bus configuration

SDA

SCL

OTHER DEVICE

WITH I2C-BUS

INTERFACE

002aaa898

P89LPC932A1_3

Product data sheet

Rev. 03 — 12 March 2007

© NXP B.V. 2007. All rights reserved.

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