C505 / C505C
C505A / C505CA
A/D Converter Characteristics of C505A and C505CA
(Operating Conditions apply)
Parameter
Analog input voltage
Sample time
Conversion cycle time
Total unadjusted error
Internal resistance of
reference voltage source
Internal resistance of
analog source
ADC input capacitance
Notes see next page.
Symbol
VAIN
tS
tADCC
TUE
RAREF
RASRC
CAIN
Limit Values
min. max.
VAGND
–
–
–
VAREF
64 x tIN
32 x tIN
16 x tIN
8 x tIN
384 x tIN
192 x tIN
96 x tIN
48 x tIN
±2
–
±4
Unit
V
ns
ns
LSB
LSB
–
tADC / 250 kΩ
- 0.25
–
tS / 500 kΩ
- 0.25
–
50
pF
Test Condition
1)
Prescaler ÷ 32
Prescaler ÷ 16
Prescaler ÷ 8
Prescaler ÷ 4 2)
Prescaler ÷ 32
Prescaler ÷ 16
Prescaler ÷ 8
Prescaler ÷ 4 3)
VSS+0.5V ≤ VAIN ≤ VDD-0.5V 4)
VSS < VAIN < VDD+0.5V
VDD - 0.5 V < VAIN < VDD 4)
tADC in [ns] 5) 6)
tS in [ns] 2) 6)
6)
Clock calculation table :
Clock Prescaler ADCL1, 0
Ratio
÷ 32
11
÷ 16
10
÷8
01
÷4
00
tADC
32 x tIN
16 x tIN
8 x tIN
4 x tIN
tS
64 x tIN
32 x tIN
16 x tIN
8 x tIN
tADCC
384 x tIN
192 x tIN
96 x tIN
48 x tIN
Further timing conditions : tADC min = 500 ns
tIN = 1 / fOSC = tCLP
Data Sheet
66
08.00