PCA9541AD View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
Manufacturer
PCA9541AD Datasheet PDF : 41 Pages
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NXP Semiconductors
PCA9541A
2-to-1 I2C-bus master selector with interrupt logic and reset
9.5 Bus transactions
slave address
command code register
data
Interrupt Enable (IE)
register
data control register
(CONTROL)
S 1 1 1 A3 A2 A1 A0 0 A 0 0 0 1 0 0 0 0 A
A
AP
START condition
R/W
acknowledge
from slave
auto
increment
acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
STOP
condition
002aab607
Fig 13. Write to the Interrupt Enable and Control registers using the Auto-Increment (AI) bit
Remark: If a third data byte is sent, it will not be acknowledged by the PCA9541A.
slave address
command code register
access to register
xx = 00, 01, or 10
slave address
S 1 1 1 A3 A2 A1 A0 0 A 0 0 0 1 0 0 x x A Sr 1 1 1 A3 A2 A1 A0 1 A
START condition
R/W
acknowledge
from slave
(1)
auto
increment
acknowledge re-START
from slave condition
(2)
R/W
acknowledge
from slave
(3)
A
A
AP
acknowledge
from master
(1) xx = 00: Interrupt Enable register
xx = 01: Control register
xx = 10: INT register
(2) xx = 00: Control register
xx = 01: INT register
xx = 10: Interrupt Enable register
(3) xx = 00: INT register
xx = 01: Interrupt Enable register
xx = 10: Control register
Fig 14. Read the 3 registers using the Auto-Increment (AI) bit
acknowledge
from master
no acknowledge
from master
STOP
condition
002aab608
Remark: If a fourth data byte is read, the first register will be accessed.
PCA9541A_3
Product data sheet
Rev. 03 — 16 July 2009
© NXP B.V. 2009. All rights reserved.
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