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ST7PSCR1E4M1/XXX View Datasheet(PDF) - STMicroelectronics

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Description
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ST7PSCR1E4M1/XXX Datasheet PDF : 102 Pages
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ST7SCR
14.3 SUPPLY AND RESET CHARACTERISTICS
(T = 0 to +70oC, VDD - VSS = 5.5V unless otherwise specified.
LOW VOLTAGE DETECTOR AND SUPERVISOR (LVDS)
Symbol
Parameter
Conditions
VIT+
VIT-
Vhys
VtPOR
Reset release threshold
(VDD rising)
Reset generation threshold
(VDD falling)
Hysteresis VIT+ - VIT-
VDD rise time rate
14.4 CLOCK AND TIMING CHARACTERISTICS
14.4.1 General Timings
(Operating conditions TA = 0 to +70°C unless otherwise specified)
Symbol
Parameter
Conditions
tc(INST)
tv(IT)
Instruction cycle time
Interrupt reaction time 2)
tv(IT) = tc(INST) + 10
fCPU=4MHz
fCPU=4MHz
* tINST is the number of tCPU to finish the current instruction execution.
14.4.2 External Clock Source
Symbol
VOSC1H
VOSC1L
tw(OSC1H)
tw(OSC1L)
tr(OSC1)
tf(OSC1)
IL
Parameter
OSC1 input pin high level voltage
OSC1 input pin low level voltage
OSC1 high or low time 3)
OSC1 rise or fall time 3)
OSCx Input leakage current
Conditions
see Figure 38
VSSVINVDD
Min
Typ
Max
Unit
3.7
3.9
V
3.3
3.5
200
20
V
mV
ms/V
Min
Typ 1)
Max
2
3
12
500
750
3000
10
22
2.5
5.5
Unit
tCPU
ns
tCPU
µs
Min
Typ
0.7xVDD
VSS
15
Max
VDD
0.3xVDD
Unit
V
ns
15
±1
µA
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