PIC12F609/615/617/12HV609/615
REGISTER 5-5: WPU: WEAK PULL-UP GPIO REGISTER
U-0
—
bit 7
U-0
R/W-1
R/W-1
U-0
—
WPU5
WPU4
—
R/W-1
WPU2
R/W-1
WPU1
R/W-1
WPU0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5-4
bit 3
bit 2-0
Unimplemented: Read as ‘0’
WPU<5:4>: Weak Pull-up Control bits
1 = Pull-up enabled
0 = Pull-up disabled
WPU<3>: Weak Pull-up Register bit(3)
WPU<2:0>: Weak Pull-up Control bits
1 = Pull-up enabled
0 = Pull-up disabled
Note 1:
2:
3:
4:
Global GPPU must be enabled for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in Output mode (TRISIO = 0).
The GP3 pull-up is enabled when configured as MCLR in the Configuration Word, otherwise it is disabled
as an input and reads as ‘0’.
WPU<5:4> always reads ‘1’ in XT, HS and LP Oscillator modes.
REGISTER 5-6: IOC: INTERRUPT-ON-CHANGE GPIO REGISTER
U-0
—
bit 7
U-0
R/W-0
R/W-0
R/W-0
R/W-0
—
IOC5
IOC4
IOC3
IOC2
R/W-0
IOC1
R/W-0
IOC0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
IOC<5:0>: Interrupt-on-change GPIO Control bit
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled
Note 1: Global Interrupt Enable (GIE) must be enabled for individual interrupts to be recognized.
2: IOC<5:4> always reads ‘1’ in XT, HS and LP Oscillator modes.
DS41302D-page 46
2010 Microchip Technology Inc.