PIC16C432
FIGURE 4-4:
BLOCK DIAGRAM OF RA4 PIN
Data
Bus
WR
PORTA
WR
TRISA
D
Q
CK Q
Data Latch
D
Q
CK Q
TRIS Latch
Comparator Mode = 110
Comparator Output
N
RA4 Pin
Vss
RD TRISA
RD PORTA
Schmitt Trigger
Input Buffer
Q
D
EN
TMR0 Clock Input
TABLE 4-1: PORTA FUNCTIONS
Name
Bit #
Buffer
Type
RA0/AN0
bit0
ST
LINRX
bit1
ST
RA2/AN2/VREF
bit2
ST
RA3/AN3
bit3
ST
RA4/T0CKI
bit4
ST
Legend: ST = Schmitt Trigger input
Function
Input/output or comparator input.
LIN receive pin.
Input/output or comparator input or VREF output.
Input/output or comparator input/output.
Input/output or external clock input for TMR0 or comparator output.
Output is open drain type.
TABLE 4-2: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
Value on:
POR
Value on
All Other
RESETS
05h
PORTA
—
85h
TRISA
—
—
— RA4
RA3
RA2
LINRX
RA0 ---x 0000 ---u 0000
—
— TRISA4 TRISA3 TRISA2 TLINRX(2) TRISA0 ---1 1111 ---1 1111
1Fh
CMCON C2OUT C1OUT —
—
CIS
CM2
CM1
CM0 00-- 0000 00-- 0000
9Fh
VRCON VREN VROE VRR —
VR3
VR2
VR1
VR0 000- 0000 000- 0000
Legend: — = Unimplemented locations, read as ‘0’, x = unknown, u = unchanged
Note 1: Shaded bits are not used by PORTA.
2: TLINRX must be set to ‘1’ at all times.
2000-2013 Microchip Technology Inc.
Preliminary
DS41140C-page 19