FIGURE 13-15: I2C BUS START/STOP BITS TIMING
SCL
SDA
91
90
PIC16C62B/72A
93
92
START
Condition
Note: Refer to Figure 13-4 for load conditions.
STOP
Condition
TABLE 13-11: I2C BUS START/STOP BITS REQUIREMENTS
Parameter Sym
No.
90*
TSU:STA
Characteristic
START condition 100 kHz mode
Setup time
400 kHz mode
Min Ty Max Unit
p
s
Conditions
4700 — —
600 — —
ns Only relevant for repeated
START condition
91*
THD:STA START condition 100 kHz mode 4000 — — ns After this period the first clock
Hold time
400 kHz mode 600 — —
pulse is generated
92*
TSU:STO STOP condition 100 kHz mode 4700 — — ns
Setup time
400 kHz mode 600 — —
93
THD:STO STOP condition 100 kHz mode 4000 — — ns
Hold time
400 kHz mode 600 — —
* These parameters are characterized but not tested.
© 1998 Microchip Technology Inc.
Preliminary
DS35008B-page 99