PIC16C745/SP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16C745/SP

8-Bit CMOS Microcontrollers with USB

Microchip Technology 

PIC16C745/765

TABLE 4-1: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)

Address Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on: Value on all

POR, other resets

BOR

(2)

Bank 1

80h

INDF(3)

Addressing this location uses contents of FSR to address data memory (not a physical register)

0000 0000 0000 0000

81h

OPTION

RBPU INTEDG

T0CS

T0SE

82h

PCL(3)

Program Counter’s (PC) Least Significant Byte

83h

STATUS(3)

IRP

RP1

RP0

TO

84h

FSR(3)

Indirect data memory address pointer

PSA

PD

PS2

PS1

PS0 1111 1111 1111 1111

0000 0000 0000 0000

Z

DC

C

0001 1xxx 000q quuu

xxxx xxxx uuuu uuuu

85h

TRISA

—

—

PORTA Data Direction Register

--11 1111 --11 1111

86h

TRISB

PORTB Data Direction Register

1111 1111 1111 1111

87h

TRISC

TRISC7 TRISC8

—

—

—

TRISC2

TRISC1 TRISC0 11-- -111 11-- -111

88h

TRISD(4) PORTD Data Direction Register

1111 1111 1111 1111

89h

TRISE(4)

IBF

OBF

IBOV PSPMODE

—

PORTE Data Direction Bits

0000 -111 0000 -111

8Ah

PCLATH(1,3)

—

—

—

Write Buffer for the upper 5 bits of the Program Counter

---0 0000 ---0 0000

8Bh

INTCON(3)

GIE

PEIE

T0IE

INTE

RBIE

T0IF

INTF

RBIF 0000 000x 0000 000u

8Ch

PIE1

PSPIE(4)

ADIE

RCIE

TXIE

USBIE

CCP1IE

TMR2IE TMR1IE 0000 0000 0000 0000

8Dh

PIE2

—

—

—

—

—

—

—

CCP2IE ---- ---0 ---- ---0

8Eh

PCON

—

—

—

—

—

—

POR

BOR ---- --qq ---- --uu

8Fh

—

Unimplemented

—

—

90h

—

Unimplemented

—

—

91h

—

Unimplemented

—

—

92h

PR2

Timer2 Period Register

1111 1111 1111 1111

93h

—

Unimplemented

—

—

94h

—

Unimplemented

—

—

95h

—

Unimplemented

—

—

96h

—

Unimplemented

—

—

97h

—

Unimplemented

—

—

98h

TXSTA

CSRC

TX9

TXEN

SYNC

—

BRGH

TRMT

TX9D 0000 -010 0000 -010

99h

SPBRG Baud Rate Generator Register

0000 0000 0000 0000

9Ah

—

Unimplemented

—

—

9Bh

—

Unimplemented

—

—

9Ch

—

Unimplemented

—

—

9Dh

—

Unimplemented

—

—

9Eh

—

Unimplemented

—

—

9Fh

ADCON1

—

—

—

—

—

PCFG2

PCFG1 PCFG0 ---- -000 ---- -000

Legend:

Note 1:

2:

3:

4:

x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as ’0’.

Shaded locations are unimplemented, read as ‘0’.

The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose contents

are transferred to the upper byte of the program counter.

Other (non power-up) resets include external reset through MCLR and Watchdog Timer Reset.

These registers can be addressed from either bank.

The Parallel Slave Port (PORTD and PORTE) is not implemented on the PIC16C745, always maintain these bits clear.

DS41124A-page 18

Advanced Information

© 1999 Microchip Technology Inc.

Share Link: