PIC16CE624T-04SS View Datasheet(PDF) - Microchip Technology
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Description
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PIC16CE624T-04SS Datasheet PDF : 113 Pages
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10.3 Reset
The PIC16CE62X differentiates between various kinds
of reset:
a) Power-on reset (POR)
b) MCLR reset during normal operation
c) MCLR reset during SLEEP
d) WDT reset (normal operation)
e) WDT wake-up (SLEEP)
f) Brown-out Reset (BOD)
Some registers are not affected in any reset condition.
Their status is unknown on POR and unchanged in any
other reset. Most other registers are reset to a “reset
PIC16CE62X
state” on Power-on reset, MCLR reset, WDT reset and
MCLR reset during SLEEP. They are not affected by a
WDT wake-up, since this is viewed as the resumption
of normal operation. TO and PD bits are set or cleared
differently in different reset situations as indicated in
Table 10-4. These bits are used in software to deter-
mine the nature of the reset. See Table 10-6 for a full
description of reset states of all registers.
A simplified block diagram of the on-chip reset circuit is
shown in Figure 10-6.
The MCLR reset path has a noise filter to detect and
ignore small pulses. See Table 13-5 for pulse width
specification.
FIGURE 10-6: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
External
Reset
MCLR/
VPP Pin
VDD
SLEEP
WDT WDT
Module Time-out
Reset
VDD rise
detect
Power-on Reset
Brown-out
Reset BODEN
S
OST/PWRT
OST
10-bit Ripple-counter
R
OSC1/
CLKIN
Pin
On-chip(1)
RC OSC
PWRT
10-bit Ripple-counter
Chip_Reset
Q
Enable PWRT
Enable OST
See Table 10-3 for time-out situations.
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
© 1999 Microchip Technology Inc.
DS40182C-page 53
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