PIC16LF72-IP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16LF72-IP

28-Pin, 8-Bit CMOS FLASH Microcontoller with A/D Converter

Microchip Technology 

PIC16F72

TABLE 2-1: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)

Address Name Bit 7 Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on Details on

POR, BOR page:

Bank 1

80h(1) INDF

Addressing this location uses contents of FSR to address data memory (not a physical register) 0000 0000 19

81h

OPTION RBPU INTEDG T0CS

T0SE

PSA

PS2

PS1

PS0 1111 1111 13

82h(1) PCL

Program Counter's (PC) Least Significant Byte

0000 0000 18

83h(1) STATUS

IRP

RP1

RP0

TO

PD

Z

DC

C

0001 1xxx 12

84h(1) FSR

Indirect Data Memory Address Pointer

xxxx xxxx 19

85h

TRISA

—

— PORTA Data Direction Register

--11 1111 21

86h

TRISB PORTB Data Direction Register

1111 1111 23

87h

TRISC PORTC Data Direction Register

1111 1111 25

88h

— Unimplemented

—

—

89h

—

8Ah(1,2) PCLATH

8Bh(1) INTCON

Unimplemented

—

—

GIE

PEIE

— Write Buffer for the upper 5 bits of the PC

TMR0IE INTE

RBIE TMR0IF INTF

—

—

---0 0000 18

RBIF 0000 000x 14

8Ch

PIE1

—

ADIE

—

—

SSPIE CCP1IE TMR2IE TMR1IE -0-- 0000 15

8Dh

— Unimplemented

—

—

8Eh

PCON

—

—

—

—

—

—

POR

BOR ---- --qq 17

8Fh

— Unimplemented

—

—

90h

— Unimplemented

—

—

91h

— Unimplemented

—

—

92h

PR2

Timer2 Period Register

93h

SSPADD Synchronous Serial Port (I2C mode) Address Register

1111 1111

0000 0000

41

43,48

94h

SSPSTAT SMP CKE

D/A

P

S

R/W

UA

BF 0000 0000 44

95h

— Unimplemented

—

—

96h

— Unimplemented

—

—

97h

— Unimplemented

—

—

98h

— Unimplemented

—

—

99h

— Unimplemented

—

—

9Ah

— Unimplemented

—

—

9Bh

— Unimplemented

—

—

9Ch

— Unimplemented

—

—

9Dh

— Unimplemented

—

—

9Eh

— Unimplemented

—

—

9Fh

ADCON1

—

—

—

—

—

PCFG2 PCFG1 PCFG0 ---- -000

54

Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.

Shaded locations are unimplemented, read as ‘0’.

Note 1: These registers can be addressed from any bank.

2: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose

contents are transferred to the upper byte of the program counter.

3: This bit always reads as a ‘1’.

DS39597C-page 10

© 2007 Microchip Technology Inc.

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