PIC16LF72-IP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16LF72-IP

28-Pin, 8-Bit CMOS FLASH Microcontoller with A/D Converter

Microchip Technology 

PIC16F72

2.2.2.4 PIE1 Register

This register contains the individual enable bits for the

peripheral interrupts.

Note: Bit PEIE (INTCON<6>) must be set to

enable any peripheral interrupt.

REGISTER 2-4:

PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1 (ADDRESS 8Ch)

U-0

R/W-0

U-0

U-0

R/W-0 R/W-0 R/W-0 R/W-0

—

ADIE

—

—

SSPIE CCP1IE TMR2IE TMR1IE

bit 7

bit 0

bit 7

bit 6

bit 5-4

bit 3

bit 2

bit 1

bit 0

Unimplemented: Read as ‘0’

ADIE: A/D Converter Interrupt Enable bit

1 = Enables the A/D converter interrupt

0 = Disables the A/D converter interrupt

Unimplemented: Read as ‘0’

SSPIE: Synchronous Serial Port Interrupt Enable bit

1 = Enables the SSP interrupt

0 = Disables the SSP interrupt

CCP1IE: CCP1 Interrupt Enable bit

1 = Enables the CCP1 interrupt

0 = Disables the CCP1 interrupt

TMR2IE: TMR2 to PR2 Match Interrupt Enable bit

1 = Enables the TMR2 to PR2 match interrupt

0 = Disables the TMR2 to PR2 match interrupt

TMR1IE: TMR1 Overflow Interrupt Enable bit

1 = Enables the TMR1 overflow interrupt

0 = Disables the TMR1 overflow interrupt

Legend:

R = Readable bit

- n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared x = Bit is unknown

© 2007 Microchip Technology Inc.

DS39597C-page 15

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