PIC16C712/716
12.1 DC Characteristics: PIC16C712/716-04 (Commercial, Industrial, Extended)
PIC16C712/716-20 (Commercial, Industrial, Extended)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature
0°C ≤ TA ≤ +70°C for commercial
-40°C ≤ TA ≤ +85°C for industrial
-40°C ≤ TA ≤ +125°C for extended
Param Sym
No.
Characteristic
Min Typ† Max Units
Conditions
D001 VDD
D001A
Supply Voltage
4.0
-
VBOR*
-
5.5 V
5.5
V BOR enabled (Note 7)
D002* VDR RAM Data Retention Voltage(1)
-
1.5
-
V
D003 VPOR VDD Start Voltage to ensure inter-
-
nal Power-on Reset signal
VSS
-
V See section on Power-on Reset for details
D004* SVDD VDD Rise Rate to ensure internal 0.05
-
D004A*
Power-on Reset signal
TBD
-
- V/ms PWRT enabled (PWRTE bit clear)
-
PWRT disabled (PWRTE bit set)
See section on Power-on Reset for details
D005
VBOR Brown-out Reset
voltage trip point
3.65
- 4.35 V BODEN bit set
D010 IDD
D013
Supply Current(2,5)
-
0.8 2.5 mA FOSC = 4 MHz, VDD = 4.0V
-
4.0 8.0 mA FOSC = 20 MHz, VDD = 4.0V
D020 IPD
D021
D021B
Power-down Current(3,5)
-
10.5 42 µA VDD = 4.0V, WDT enabled,-40°C to +85°C
-
1.5 16 µA VDD = 4.0V, WDT disabled, 0°C to +70°C
-
1.5 19 µA VDD = 4.0V, WDT disabled,-40°C to +85°C
-
2.5 19 µA VDD = 4.0V, WDT disabled,-40°C to +125°C
D022*
D022A*
∆IWDT
∆IBOR
Module Differential Current(6)
Watchdog Timer
Brown-out Reset
-
6.0 20 µA WDTE bit set, VDD = 4.0V
-
TBD 200 µA BODEN bit set, VDD = 5.0V
1A
FOSC LP Oscillator Operating Frequency 0
— 200 KHz All temperatures
RC Oscillator Operating Frequency 0
—
4 MHz All temperatures
XT Oscillator Operating Frequency 0
—
4 MHz All temperatures
HS Oscillator Operating Frequency 0
— 20 MHz All temperatures
*
†
Note1:
2:
3:
4:
5:
6:
7:
These parameters are characterized but not tested.
Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
This is the limit to which VDD can be lowered without losing RAM data.
The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin loading and
switching rate, oscillator type, internal code execution pattern, and temperature also have an impact on the current con-
sumption.
The test conditions for all IDD measurements in active operation mode are:
OSC1 = external square wave, from rail to rail; all I/O pins tristated, pulled to VDD,
MCLR = VDD; WDT enabled/disabled as specified.
The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is measured with the
part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS.
For RC osc mode, current through Rext is not included. The current through the resistor can be estimated by the formula Ir =
VDD/2Rext (mA) with Rext in kOhm.
Timer1 oscillator (when enabled) adds approximately 20 µA to the specification. This value is from characterization and is for
design guidance only. This is not tested.
The ∆ current is the additional current consumed when this peripheral is enabled. This current should be added to the base
IDD or IPD measurement.
This is the voltage where the device enters the Brown-out Reset. When BOR is enabled, the device will operate correctly to
this trip point.
© 1999 Microchip Technology Inc.
Preliminary
DS41106A-page 77