Example 6-4 shows the sequence to perform an 16 x
16 signed multiply. Equation 6-2 shows the algorithm
used. The 32-bit result is stored in four registers
RES3:RES0. To account for the sign bits of the argu-
ments, each argument pairs most significant bit (MSb)
is tested and the appropriate subtractions are done.
EQUATION 6-2:
16 x 16 SIGNED
MULTIPLICATION
ALGORITHM
RES3:RES0
= ARG1H:ARG1L • ARG2H:ARG2L
= (ARG1H • ARG2H • 216) +
(ARG1H • ARG2L • 28) +
(ARG1L • ARG2H • 28) +
(ARG1L • ARG2L)
+
(-1 • ARG2H<7> • ARG1H:ARG1L • 216) +
(-1 • ARG1H<7> • ARG2H:ARG2L • 216)
PIC18CXX8
EXAMPLE 6-4: 16 x 16 SIGNED MULTIPLY
ROUTINE
MOVFF
MULWF
MOVFF
MOVFF
;
MOVFF
MULWF
MOVFF
MOVFF
;
MOVFF
MULWF
MOVF
ADDWF
MOVF
ADDWFC
CLRF
ADDWFC
;
MOVFF
MULWF
MOVF
ADDWF
MOVF
ADDWFC
CLRF
ADDWFC
;
BTFSS
GOTO
MOVFF
SUBWF
MOVFF
SUBWFB
;
SIGN_ARG1
BTFSS
GOTO
MOVFF
SUBWF
MOVFF
SUBWFB
;
CONT_CODE
:
ARG1L, WREG
ARG2L
PRODH, RES1
PRODL, RES0
ARG1H, WREG
ARG2H
PRODH, RES3
PRODL, RES2
ARG1L, WREG
ARG2H
PRODL, W
RES1, F
PRODH, W
RES2, F
WREG
RES3, F
ARG1H, WREG
ARG2L
PRODL, W
RES1, F
PRODH, W
RES2, F
WREG
RES3, F
ARG2H, 7
SIGN_ARG1
ARG1L, WREG
RES2
ARG1H, WREG
RES3
ARG1H, 7
CONT_CODE
ARG2L, WREG
RES2
ARG2H, WREG
RES3
; ARG1L * ARG2L ->
; PRODH:PRODL
;
;
; ARG1H * ARG2H ->
; PRODH:PRODL
;
;
; ARG1L * ARG2H ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
;
; ARG1H * ARG2L ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
; ARG2H:ARG2L neg?
; no, check ARG1
;
;
;
; ARG1H:ARG1L neg?
; no, done
;
;
;
2000 Microchip Technology Inc.
Advanced Information
DS30475A-page 73