PIC18F44J10T-I/ML(2009) View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F44J10T-I/ML
(Rev.:2009)

28/40/44-Pin High-Performance, RISC Microcontrollers

Microchip Technology 

PIC18F45J10 FAMILY

TABLE 24-25: A/D CONVERSION REQUIREMENTS

Param

No.

Symbol

Characteristic

Min Max Units

Conditions

130 TAD

A/D Clock Period

0.7 25.0(1) μs TOSC based, VREF ≥ 2.0V

131 TCNV Conversion Time

11

12

TAD

(not including acquisition time) (Note 2)

132 TACQ Acquisition Time (Note 3)

1.4

—

μs -40°C to +85°C

135 TSWC Switching Time from Convert → Sample

— (Note 4)

Note 1:

2:

3:

4:

The time of the A/D clock period is dependent on the device frequency and the TAD clock divider.

ADRES registers may be read on the following TCY cycle.

The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale

after the conversion (VDD to VSS or VSS to VDD). The source impedance (RS) on the input channels is 50Ω.

On the following cycle of the device clock.

© 2009 Microchip Technology Inc.

DS39682E-page 335

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