PIC18F45J50-I/SOSQTP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F45J50-I/SOSQTP

28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC18F46J50 FAMILY

11.2 Slave Port Modes

The primary mode of operation for the module is

configured using the MODE<1:0> bits in the

PMMODEH register. The setting affects whether the

module acts as a slave or a master and it determines

the usage of the control pins.

11.2.1 LEGACY MODE (PSP)

In Legacy mode (PMMODEH<1:0> = 00 and

PMPEN = 1), the module is configured as a Parallel

Slave Port (PSP) with the associated enabled module

pins dedicated to the module. In this mode, an external

device, such as another microcontroller or micro-

processor, can asynchronously read and write data

using the 8-bit data bus (PMD<7:0>), the read (PMRD),

write (PMWR) and chip select (PMCS1) inputs. It acts

as a slave on the bus and responds to the read/write

control signals.

Figure 11-2 displays the connection of the PSP.

When chip select is active and a write strobe occurs

(PMCS = 1 and PMWR = 1), the data from

PMD<7:0> is captured into the PMDIN1L register.

FIGURE 11-2:

LEGACY PARALLEL SLAVE PORT EXAMPLE

PIC18F Master

PMD<7:0>

PMCS1

PMRD

PMWR

PIC18F Slave

PMD<7:0>

PMCS

PMRD

PMWR

Address Bus

Data Bus

Control Lines

DS39931D-page 178

 2011 Microchip Technology Inc.

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