PIC18F45J50-I/SOSQTP View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC18F45J50-I/SOSQTP
Microchip Technology
PIC18F45J50-I/SOSQTP Datasheet PDF : 562 Pages
| |||
PIC18F46J50 FAMILY
11.2.2 WRITE TO SLAVE PORT
When chip select is active and a write strobe occurs
(PMCS = 1 and PMWR = 1), the data from PMD<7:0>
is captured into the lower PMDIN1L register. The
PMPIF and IBF flag bits are set when the write
ends.The timing for the control signals in Write mode is
displayed in Figure 11-3. The polarity of the control
signals are configurable.
11.2.3 READ FROM SLAVE PORT
When chip select is active and a read strobe occurs
(PMCS = 1 and PMRD = 1), the data from the
PMDOUT1L register (PMDOUT1L<7:0>) is presented
onto PMD<7:0>. Figure 11-4 provides the timing for the
control signals in Read mode.
FIGURE 11-3:
PARALLEL SLAVE PORT WRITE WAVEFORMS
| Q4 | Q1 | Q2 | Q3 | Q4
PMCS
PMWR
PMRD
PMD<7:0>
IBF
OBE
PMPIF
FIGURE 11-4:
PMCS
PMWR
PMRD
PMD<7:0>
IBF
OBE
PMPIF
PARALLEL SLAVE PORT READ WAVEFORMS
| Q4 | Q1 | Q2 | Q3 | Q4
2011 Microchip Technology Inc.
DS39931D-page 179
Share Link: 