PIC18F45J50-I/SOSQTP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F45J50-I/SOSQTP

28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC18F46J50 FAMILY

TABLE 30-32: A/D CONVERSION REQUIREMENTS

Param

No.

Symbol

Characteristic

Min Max Units

Conditions

130 TAD

A/D Clock Period

0.7 25.0(1) s TOSC based, VREF  3.0V

131 TCNV Conversion Time

(not including acquisition time)(2)

11

12

TAD

132 TACQ Acquisition Time(3)

1.4

—

s -40C to +85C

135 TSWC Switching Time from Convert  Sample

— (Note 4)

137 TDIS Discharge Time

0.2

—

s

Note 1: The time of the A/D clock period is dependent on the device frequency and the TAD clock divider.

2: ADRES registers may be read on the following TCY cycle.

3: The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale

after the conversion (VDD to VSS or VSS to VDD). The source impedance (RS) on the input channels is 50.

4: On the following cycle of the device clock.

FIGURE 30-24:

USB SIGNAL TIMING

USB Data Differential Lines

90%

VCRS

10%

TLR, TFR

TLF, TFF

TABLE 30-33: USB LOW-SPEED TIMING REQUIREMENTS

Param

No.

Symbol

Characteristic

Min Typ

TLR

TLF

TLRFM

Transition Rise Time

Transition Fall Time

Rise/Fall Time Matching

75

—

75

—

80

—

Max Units

Conditions

300

ns CL = 200 to 600 pF

300

ns CL = 200 to 600 pF

125

%

TABLE 30-34: USB FULL-SPEED REQUIREMENTS

Param

No.

Symbol

Characteristic

Min

TFR

Transition Rise Time

4

TFF

Transition Fall Time

4

TFRFM Rise/Fall Time Matching

90

Typ Max Units

Conditions

—

20

ns CL = 50 pF

—

20

ns CL = 50 pF

—

111.1

%

DS39931D-page 530

 2011 Microchip Technology Inc.

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