PIC18LF8410-I/PTQTP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18LF8410-I/PTQTP

64/80-Pin Flash Microcontrollers with nanoWatt Technology

Microchip Technology 

PIC18F6310/6410/8310/8410

4.6 Reset State of Registers

Most registers are unaffected by a Reset. Their status

is unknown on POR and unchanged by all other

Resets. The other registers are forced to a “Reset

state” depending on the type of Reset that occurred.

Most registers are not affected by a WDT wake-up,

since this is viewed as the resumption of normal

operation. Status bits from the RCON register, RI, TO,

PD, POR and BOR, are set or cleared differently in

different Reset situations, as indicated in Table 4-3.

These bits are used in software to determine the nature

of the Reset.

Table 4-4 describes the Reset states for all of the

Special Function Registers. These are categorized by

Power-on and Brown-out Resets, Master Clear and

WDT Resets and WDT wake-ups.

TABLE 4-3: STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR

RCON REGISTER

Condition

Program

Counter

SBOREN

RCON Register

STKPTR Register

RI TO PD POR BOR STKFUL STKUNF

Power-on Reset

0000h

1

11100

0

0

RESET Instruction

0000h

u(2)

0uuuu

u

u

Brown-out Reset

0000h

u(2)

111u0

u

u

MCLR Reset during Power

0000h

u(2)

u1uuu

u

u

Managed Run Modes

MCLR Reset during Power

0000h

u(2)

u10uu

u

u

Managed Idle Modes and Sleep

WDT Time-out during Full Power 0000h

u(2)

u0uuu

u

u

or Power Managed Run Modes

MCLR Reset during Full Power

0000h

u(2)

uuuuu

u

u

Execution

Stack Full Reset (STVREN = 1)

0000h

u(2)

uuuuu

1

u

Stack Underflow Reset

0000h

u(2)

uuuuu

u

1

(STVREN = 1)

Stack Underflow Error (not an

0000h

u(2)

uuuuu

u

1

actual Reset, STVREN = 0)

WDT Time-out during Power

PC + 2

u(2)

u00uu

u

u

Managed Idle or Sleep Modes

Interrupt Exit from Power

PC + 2(1)

u(2)

uu0uu

u

u

Managed Modes

Legend: u = unchanged

Note 1: When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the

interrupt vector (008h or 0018h).

2: Reset state is ‘1’ for POR and unchanged for all other Resets when software BOR is enabled

(BOREN1:BOREN0 configuration bits = 01 and SBOREN = 1). Otherwise, the Reset state is ‘0’.

DS39635A-page 56

Preliminary

 2004 Microchip Technology Inc.

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