PIC18F258-I/SP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F258-I/SP

28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

Microchip Technology 

PIC18FXX8

BTG

Bit Toggle f

Syntax:

Operands:

Operation:

Status Affected:

Encoding:

Description:

Words:

[ label ] BTG f,b[,a]

0 ≤ f ≤ 255

0≤b≤7

a ∈ [0,1]

(f<b>) → f<b>

None

0111 bbba ffff ffff

Bit ‘b’ in data memory location ‘f’ is

inverted. If ‘a’ is ‘0’, the Access Bank will

be selected, overriding the BSR value. If

‘a’ = 1, then the bank will be selected as

per the BSR value (default).

1

Cycles:

1

Q Cycle Activity:

Q1

Decode

Q2

Read

register ‘f’

Q3

Process

Data

Q4

Write

register ‘f’

Example:

BTG

PORTC, 4

Before Instruction:

PORTC =

After Instruction:

PORTC =

0111 0101 [0x75]

0110 0101 [0x65]

BOV

Branch if Overflow

Syntax:

Operands:

Operation:

Status Affected:

Encoding:

Description:

[ label ] BOV n

-128 ≤ n ≤ 127

if Overflow bit is ‘1’

(PC) + 2 + 2n → PC

None

1110 0100 nnnn nnnn

If the Overflow bit is ‘1’, then the

program will branch.

The 2’s complement number ‘2n’ is

added to the PC. Since the PC will have

incremented to fetch the next instruc-

tion, the new address will be

PC + 2 + 2n. This instruction is then a

two-cycle instruction.

Words:

Cycles:

Q Cycle Activity:

If Jump:

Q1

Decode

No

operation

If No Jump:

Q1

Decode

1

1(2)

Q2

Read literal

‘n’

No

operation

Q2

Read literal

‘n’

Q3

Process

Data

No

operation

Q3

Process

Data

Q4

Write to

PC

No

operation

Q4

No

operation

Example:

HERE

Before Instruction

PC

=

After Instruction

If Overflow =

PC

=

If Overflow =

PC

=

BOV JUMP

address (HERE)

1;

address (JUMP)

0;

address (HERE + 2)

© 2006 Microchip Technology Inc.

DS41159E-page 295

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