PIC18F258-I/SP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F258-I/SP

28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module

Microchip Technology 

PIC18FXX8

COMF

Syntax:

Operands:

Operation:

Status Affected:

Encoding:

Description:

Words:

Cycles:

Q Cycle Activity:

Q1

Decode

Complement f

[ label ] COMF

0 ≤ f ≤ 255

d ∈ [0,1]

a ∈ [0,1]

( f ) → dest

N, Z

f [,d [,a]]

0001 11da ffff ffff

The contents of register ‘f’ are

complemented. If ‘d’ is ‘0’, the result is

stored in W. If ‘d’ is ‘1’, the result is

stored back in register ‘f’ (default). If ‘a’

is ‘0’, the Access Bank will be selected,

overriding the BSR value. If ‘a’ = 1, then

the bank will be selected as per the

BSR value (default).

1

1

Q2

Read

register ‘f’

Q3

Process

Data

Q4

Write to

destination

Example:

COMF

Before Instruction

REG =

After Instruction

REG =

W

=

0x13

0x13

0xEC

REG, W

CPFSEQ

Compare f with W, Skip if f = W

Syntax:

Operands:

Operation:

Status Affected:

[ label ] CPFSEQ f [,a]

0 ≤ f ≤ 255

a ∈ [0,1]

(f) – (W),

skip if (f) = (W)

(unsigned comparison)

None

Encoding:

Description:

0110 001a ffff ffff

Compares the contents of data memory

location ‘f’ to the contents of W by

performing an unsigned subtraction.

If ‘f’ = W, then the fetched instruction is

discarded and a NOP is executed

instead, making this a two-cycle

instruction. If ‘a’ is ‘0’, the Access Bank

will be selected, overriding the BSR

value. If ‘a’ = 1, then the bank will be

selected as per the BSR value (default).

Words:

1

Cycles:

1(2)

Note: 3 cycles if skip and followed

by a 2-word instruction.

Q Cycle Activity:

Q1

Q2

Q3

Q4

Decode

If skip:

Q1

Read

register ‘f’

Q2

Process

Data

Q3

No

operation

Q4

No

operation

No

operation

No

operation

If skip and followed by 2-word instruction:

No

operation

Q1

No

operation

No

operation

Q2

No

operation

No

operation

Q3

No

operation

No

operation

Q4

No

operation

No

operation

Example:

HERE

NEQUAL

EQUAL

CPFSEQ REG

:

:

Before Instruction

PC Address =

W

=

REG

=

After Instruction

If REG

=

PC

=

If REG

≠

PC

=

HERE

?

?

W;

Address (EQUAL)

W;

Address (NEQUAL)

DS41159E-page 298

© 2006 Microchip Technology Inc.

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