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PIC32MX210F016C-40I/SS View Datasheet(PDF) - Microchip Technology

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Description
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PIC32MX210F016C-40I/SS Datasheet PDF : 330 Pages
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PIC32MX1XX/2XX
REGISTER 7-2: INTSTAT: INTERRUPT STATUS REGISTER
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1 24/16/8/0
U-0
U-0
U-0
U-0
U-0
U-0
31:24
U-0
U-0
U-0
23:16
U-0
15:8
U-0
7:0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
SRIPL<2:0>(1)
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
VEC<5:0>(1)
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-11 Unimplemented: Read as ‘0
bit 10-8 SRIPL<2:0>: Requested Priority Level bits(1)
111-000 = The priority level of the latest interrupt presented to the CPU
bit 7-6 Unimplemented: Read as ‘0
bit 5-0 VEC<5:0>: Interrupt Vector bits(1)
11111-00000 = The interrupt vector that is presented to the CPU
Note 1: This value should only be used when the interrupt controller is configured for Single Vector mode.
REGISTER 7-3: IPTMR: INTERRUPT PROXIMITY TIMER REGISTER
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2
31:24
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
IPTMR<31:24>
R/W-0
23:16
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
IPTMR<23:16>
R/W-0
15:8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
IPTMR<15:8>
R/W-0
R/W-0
7:0
R/W-0
R/W-0
R/W-0
R/W-0
IPTMR<7:0>
R/W-0
Bit
25/17/9/1
R/W-0
R/W-0
R/W-0
R/W-0
Bit
24/16/8/0
R/W-0
R/W-0
R/W-0
R/W-0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-0 IPTMR<31:0>: Interrupt Proximity Timer Reload bits
Used by the Interrupt Proximity Timer as a reload value when the Interrupt Proximity timer is triggered by
an interrupt event.
© 2011-2014 Microchip Technology Inc.
DS60001168F-page 91

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