PIC32MX1XX/2XX
FIGURE 8-1:
OSCILLATOR DIAGRAM
USB PLL(5)
USB Clock (48 MHz)
UFIN
div x
PLL x24
UFIN = 4 MHz
UPLLIDIV<2:0>
div 2
UFRCEN
UPLLEN
REFCLKI
ROTRIM<8:0>
(M)
POSC
FRC
System PLL
4 MHz ≤ FIN ≤ 5 MHz
FIN
LPRC
SOSC
PBCLK
SYSCLK
÷ 2 × ⎝⎛N + 5---M-1---2--⎠⎞
div x
PLL
RODIV<14:0>
(N)
FPLLIDIV<2:0>
ROSEL<3:0>
OE
REFCLKO
To SPI
COSC<2:0>
Primary Oscillator
(POSC)
C1(3)
OSC1
XTAL
RP(1)
RS(1)
RF(2)
To Internal
Logic
Enable
C2(3)
OSC2(4)
div 2
To ADC
FRC
Oscillator
8 MHz typical
PLLMULT<2:0>
div y
XTPLL, HSPLL,
ECPLL, FRCPLL
PLLODIV<2:0>
Postscaler
POSC (XT, HS, EC)
div 16
FRC
FRC/16
FRCDIV
Postscaler Peripherals
div x
PBCLK (TPB)
PBDIV<1:0>
CPU and Select Peripherals
SYSCLK
TUN<5:0>
FRCDIV<2:0>
LPRC
Oscillator
31.25 kHz typical
LPRC
Secondary Oscillator (SOSC)
SOSCO
32.768 kHz
SOSCEN and FSOSCEN
SOSCI
SOSC
Clock Control Logic
Fail-Safe
Clock
Monitor
FSCM INT
FSCM Event
NOSC<2:0>
COSC<2:0>
FSCMEN<1:0>
OSWEN
WDT, PWRT
Timer1, RTCC
Notes: 1.
2.
3.
4.
5.
A series resistor, RS, may be required for AT strip cut crystals or eliminate clipping. Alternately, to increase oscillator circuit gain,
add a parallel resistor, RP, with a value of 1 MΩ.
The internal feedback resistor, RF, is typically in the range of 2 to 10 MΩ.
Refer to Section 6. “Oscillator Configuration” (DS60001112) in the “PIC32 Family Reference Manual” for help in determining the
best oscillator components.
The PBCLK out is only available on the OSC2 pin in certain clock modes.
The USB PLL is only available on PIC32MX2XX devices.
DS60001168F-page 96
© 2011-2014 Microchip Technology Inc.