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PIC32MX210F016C-40I/SS View Datasheet(PDF) - Microchip Technology

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PIC32MX210F016C-40I/SS Datasheet PDF : 330 Pages
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PIC32MX1XX/2XX
REGISTER 7-6: IPCx: INTERRUPT PRIORITY CONTROL REGISTER (CONTINUED)
bit 9-8 IS01<1:0>: Interrupt Subpriority bits
11 = Interrupt subpriority is 3
10 = Interrupt subpriority is 2
01 = Interrupt subpriority is 1
00 = Interrupt subpriority is 0
bit 7-5 Unimplemented: Read as ‘0
bit 4-2 IP00<2:0>: Interrupt Priority bits
111 = Interrupt priority is 7
010 = Interrupt priority is 2
001 = Interrupt priority is 1
000 = Interrupt is disabled
bit 1-0 IS00<1:0>: Interrupt Subpriority bits
11 = Interrupt subpriority is 3
10 = Interrupt subpriority is 2
01 = Interrupt subpriority is 1
00 = Interrupt subpriority is 0
Note: This register represents a generic definition of the IPCx register. Refer to Table 7-1 for the exact bit
definitions.
DS60001168F-page 94
© 2011-2014 Microchip Technology Inc.

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