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ST92P141K4D0 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
ST92P141K4D0
ST-Microelectronics
STMicroelectronics 
ST92P141K4D0 Datasheet PDF : 179 Pages
First Prev 161 162 163 164 165 166 167 168 169 170 Next Last
ST92141 - ELECTRICAL CHARACTERISTICS
WATCHDOG TIMING TABLE
(VDD = 5V ± 10%, TA = 40°C to +85°C, CLoad = 50pF, fINTCLK = 25MHz, Push-pull output configuration,
unless otherwise specified)
N° Symbol
Parameter
1 TwWDOL WDOUT Low Pulse Width
2 TwWDOH WDOUT High Pulse Width
3 TwWDIL
4 TwWDIH
WDIN High Pulse Width
WDIN Low Pulse Width
Value (Note)
Formula(1)
Min
160
4 x (Psc+1) x (Cnt+1) x Tck
(Psc+1) x (Cnt+1) x TWDIN
320
with TWDIN 8 x Tck
160
4 x (Psc+1) x (Cnt+1) x Tck
(Psc+1) x (Cnt+1) x TWDIN
320
with TWDIN 8 x Tck
4 x Tck + 10
170
4 x Tck +10
170
Unit
Max
ns
2.69
s
ns
ns
2.69
s
ns
ns
ns
Note: The value in the left hand column shows the formula used to calculate the timing minimum or maximum from the oscillator clock period,
watchdog prescaler and counter programmed values.
The value in the right hand two columns show the timing minimum and maximum for an internal clock (INTCLK) at 25MHz, with minimum and
maximum prescaler value and minimum and maximum counter value.
Measurement points are taken with reference to VIH-VIH / VOH-VOH for positive pulse and VIL-VIL / VOL-VOL for negative pulse
(1) Formula guaranteed by design.
Legend:
Tck = INTCLK period = OSCIN period when OSCIN is not divided by 2;
2 x OSCIN period when OSCIN is divided by 2;
OSCIN period x PLL factor when the PLL is enabled.
Psc = Watchdog Prescaler Register content (WDTPR): from 0 to 255
Cnt = Watchdog Counter Registers content (WDTRH,WDTRL): from 0 to 65535
TWDIN = Watchdog Input signal period (WDIN)
WATCHDOG TIMING
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