ST92T163N4D0 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST92T163N4D0

8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS, 20K ROM, 2K RAM, I2C, SCI, & MFT

STMicroelectronics 

ST92163 - ELECTRICAL CHARACTERISTICS

MULTIFUNCTION TIMER EXTERNAL TIMING TABLE

(VDD = 3.0 - 5.5V (1), TA = 0°C + 70°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified)

N° Symbol

Parameter

1 TwCTW External clock/trigger pulse width

2 TwCTD External clock/trigger pulse distance

3 TwAED Distance between two active edges

4 TwGW Gate pulse width

5

TwLBA

Distance between TINB pulse edge and the fol-

lowing TINA pulse edge

Value

Formula

Min

Unit Note

Max

n x Tck

n x 42

-

ns

(2)

n x Tck

n x 42

-

ns

(2)

3 x Tck

125

-

ns

6 x Tck

250

-

ns

Tck

42

-

ns

(3)

6

TwLAB

Distance between TINA pulse edge and the fol-

lowing TINB pulse edge

7 TwAD Distance between two TxINA pulses

8 TwOWD Minimum output pulse width/distance

3 x Tck

0

-

ns

(3)

0

-

ns

(3)

125

-

ns

Note: The value in the left hand column shows the formula used to calculate the timing minimum or maximum from the oscillator clock period,

standard timer prescaler and counter programmed values.

The value in the right hand two columns show the timing minimum and maximum for an internal clock (INTCLK) at 24MHz.

(1) 3.0 - 4.0V voltage range is only available on devices with suffix L or V, with different frequency limitatio ns (L: 8 MHz, V: 16 MHz)

(2) n = 1 if the input is rising OR falling edge sensitive

n = 3 if the input is rising AND falling edge sensitive

(3) In Autodiscrimination mode

Legend:

Tck = INTCLK period = OSCIN period when OSCIN is not divided by 2;

2 x OSCIN period when OSCIN is divided by 2;

OSCIN period x PLL factor when the PLL is enabled.

MULTIFUNCTION TIMER EXTERNAL TIMING

215/224

Share Link: