ST92163 - ELECTRICAL CHARACTERISTICS
SCI TIMING TABLE
(VDD = 3.0 - 5.5V (1), TA = 0°C + 70°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified)
N° Symbol
Parameter
Conditio n
FRxCKIN
Frequency of RxCKIN
1x mode
16x mode
TwRxCKIN RxCKIN shortest pulse
1x mode
16x mode
FTxCKIN
Frequency of TxCKIN
1x mode
16x mode
TwTxCKIN TxCKIN shortest pulse
1x mode
16x mode
1 TsDS
DS (Data Stable) before
rising edge of RxCKIN
1x mode reception with RxCKIN
2 TdD1
3 TdD2
TxCKIN to Data out
delay Time
CLKOUT to Data out
delay Time
1x mode transmission with external
clock CLoad < 50pF
1x mode transmission with CLKOUT
Value
Min
Max
4 x Tck
fINTCLK / 8
fINTCLK / 4
2 x Tck
4 x Tck
fINTCLK / 8
fINTCLK / 4
2 x Tck
Unit
MHz
MHz
s
s
MHz
MHz
s
s
Tck / 2
ns
2.5 x Tck ns
TBD
ns
(1) 3.0 - 4.0V voltage range is only available on devices with suffix L or V, with different frequency limitatio ns (L: 8 MHz, V: 16 MHz)
Legend:
Tck = INTCLK period = OSCIN period when OSCIN is not divided by 2;
2 x OSCIN period when OSCIN is divided by 2;
OSCIN period x PLL factor when the PLL is enabled.
SCI TIMING
216/224