PSD934210MT View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
PSD934210MT
STMicroelectronics
PSD934210MT Datasheet PDF : 89 Pages
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PSD834F2V
MCU BUS INTERFACE
The “no-glue logic” MCU Bus Interface block can
be directly connected to most popular MCUs and
their control signals. Key 8-bit MCUs, with their
bus types and control signals, are shown in Table
14. The interface type is specified using the PSD-
soft Express Configuration.
PSD Interface to a Multiplexed 8-Bit Bus. Fig-
ure 16 shows an example of a system using a
MCU with an 8-bit multiplexed bus and a PSD. The
ADIO port on the PSD is connected directly to the
MCU address/data bus. Address Strobe (ALE/AS,
PD0) latches the address signals internally.
Latched addresses can be brought out to Port A or
B. The PSD drives the ADIO data bus only when
one of its internal resources is accessed and Read
Strobe (RD, CNTL1) is active. Should the system
address bus exceed sixteen bits, Ports A, B, C, or
D may be used as additional address inputs.
Table 14. MCUs and their Control Signals
MCU
Data Bus
Width
CNTL0
CNTL1
CNTL2
PC7
PD02 ADIO0 PA3-PA0 PA7-PA3
8031
8
WR
RD
PSEN (Note 1) ALE
A0
(Note 1) (Note 1)
80C51XA
8
WR
RD
PSEN (Note 1) ALE
A4
A3-A0
(Note 1)
80C251
8
WR
PSEN (Note 1) (Note 1) ALE
A0
(Note 1) (Note 1)
80C251
8
WR
RD
PSEN (Note 1) ALE
A0
(Note 1) (Note 1)
80198
8
WR
RD
(Note 1) (Note 1) ALE
A0
(Note 1) (Note 1)
68HC11
8
R/W E
(Note 1) (Note 1) AS
A0
(Note 1) (Note 1)
68HC912
8
R/W E
(Note 1) DBE AS
A0
(Note 1) (Note 1)
Z80
8
WR
RD
(Note 1) (Note 1) (Note 1) A0
D3-D0 D7-D4
Z8
8
R/W DS
(Note 1) (Note 1) AS
A0
(Note 1) (Note 1)
68330
8
R/W DS
(Note 1) (Note 1) AS
A0
(Note 1) (Note 1)
M37702M2
8
R/W E
(Note 1) (Note 1) ALE
A0
D3-D0 D7-D4
Note: 1. Unused CNTL2 pin can be configured as CPLD input. Other unused pins (PC7, PD0, PA3-0) can be configured for other I/O func-
tions.
2. ALE/AS input is optional for MCUs with a non-multiplexed bus
37/89
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