Si4010-C2
SFR Definition 34.1. TMR_CLKSEL
Bit
Name
Type
Reset
7
6
TMR3H_MODE
R/W
0
0
SFR Address = 0xC9
5
4
TMR3L_MODE
R/W
0
0
3
2
TMR2H_MODE
R/W
0
0
1
0
TMR2L_MODE
R/W
0
0
Bit Name
Function
Timer 3 High Byte Mode Select.
7:6
TMR3H_
MODE
Timer 3 high half in split mode. Ignored if Timer 3 is in wide mode.
00: CLK_SYS
01: CLK_SYS/12
10: RTC_TICK = 5.33 µs
11: RTC_PULSE = 100 µs
Timer 3 Low Byte Mode Select.
Timer 3 low half in split mode or full timer in wide mode clock selection.
5:4
TMR3L_ 00: CLK_SYS
MODE 01: CLK_SYS/12
10: RTC_TICK = 5.33 µs
11: RTC_PULSE = 100 µs
Timer 2 High Byte Mode Select.
Timer 2 high half in split mode. Ignored if Timer 2 is in wide mode.
3:2
TMR2H_ 00: CLK_SYS
MODE 01: CLK_SYS/12
10: RTC_TICK = 5.33 µs
11: RTC_PULSE = 100 µs
Timer 2 Low Byte Mode Select.
Timer 2 low half in split mode or full timer in wide mode clock selection.
1:0
TMR2L_ 00: CLK_SYS
MODE 01: CLK_SYS/12
10: RTC_TICK = 5.33 µs
11: RTC_PULSE = 100 µs
Rev. 1.0
139